Commit History

Author SHA1 Message Date
  bors[bot] 98ae3aa285 Merge #108 2 years ago
  luojia65 9418b6c59a fix: clearify that mip.{MSIP, MTIP} are read-only 2 years ago
  bors[bot] e38a68d2ed Merge #107 2 years ago
  Daniel Maslowski 4f84bd2c28 Fix reading marchid and mimpid 2 years ago
  bors[bot] 6073fab07a Merge #105 2 years ago
  Joey Harrison d1272fadfa add a doc line for the module 2 years ago
  Joey Harrison 28715684db Add extra docs to `McycleDelay::new` 2 years ago
  bors[bot] d50928b696 Merge #104 2 years ago
  Adam Greig cdd70bb434 Fix asm::delay not clobbering count register 2 years ago
  bors[bot] b0b0695487 Merge #103 3 years ago
  Vadim Kaushan 247a415746 Fix release year in changelog 3 years ago
  bors[bot] 6bf5a994b5 Merge #102 3 years ago
  Vadim Kaushan 8a1501c84f Prepare v0.8.0 release 3 years ago
  bors[bot] b57d0ffca6 Merge #101 3 years ago
  bors[bot] ba7f4f25b7 Merge #99 3 years ago
  Vadim Kaushan 2bb9691f5d Fix changelog 3 years ago
  Taiki Endo 6d06810ed3 Remove unused macro arguments 3 years ago
  Taiki Endo 388db84229 Remove binaries 3 years ago
  Taiki Endo 780443991e Remove inline-asm feature and update MSRV to 1.59 3 years ago
  Taiki Endo 396fb9b8da Remove uses of unstable features 3 years ago
  bors[bot] cd31989ba1 Merge #95 3 years ago
  bors[bot] 61c8da79d2 Merge #94 3 years ago
  luojia65 f62fddc32a does not use `#[inline(always)]` for non-trivial functions 3 years ago
  Vadim Kaushan 04f472c434 Fix copyright year 3 years ago
  luojia65 cf65f7569e csr: inline register reads and type conversations 3 years ago
  bors[bot] dc0bc37e76 Merge #93 3 years ago
  Scott Mabin 96da9e2539 Remove riscv target post fix triple information from asm archive 3 years ago
  bors[bot] 1c68e4d57d Merge #90 3 years ago
  Vadim Kaushan daf019cd7f Update CHANGELOG.md 3 years ago
  Daniel Hayes 6be578d0ab Update CHANGELOG.md 3 years ago