Low level access to RISC-V processors

Román Cárdenas de55f4ff55 Improve CLINT codegen macro hai 1 ano
src de55f4ff55 Improve CLINT codegen macro hai 1 ano
.gitignore 197f2fcd71 First version of PLIC and (A)CLINT hai 1 ano
Cargo.toml 197f2fcd71 First version of PLIC and (A)CLINT hai 1 ano
README.md 197f2fcd71 First version of PLIC and (A)CLINT hai 1 ano

README.md

riscv-peripheral

Standard RISC-V targets for embedded systems written in Rust

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.61 and up. It might compile with older versions but that may change in any new patch release.