Low level access to RISC-V processors

1 Ramuri

Román Cárdenas de55f4ff55 Improve CLINT codegen macro		1 an în urmă
src	de55f4ff55 Improve CLINT codegen macro	1 an în urmă
.gitignore	197f2fcd71 First version of PLIC and (A)CLINT	1 an în urmă
Cargo.toml	197f2fcd71 First version of PLIC and (A)CLINT	1 an în urmă
README.md	197f2fcd71 First version of PLIC and (A)CLINT	1 an în urmă

`riscv-peripheral`

Standard RISC-V targets for embedded systems written in Rust

Minimum Supported Rust Version (MSRV)

This crate is guaranteed to compile on stable Rust 1.61 and up. It might compile with older versions but that may change in any new patch release.